techniques to achieve high isolation with gaas mmic switch chips rev. v4 application note M515 ? north america tel: 800.366.2266 ? europe tel: +353.21.244.6400 ? india tel: +91.80.4155721 ? china tel: +86.21.2407.1588 1 visit www.macomtech.com for additional data sheets and product information. m/a-com technology solutions inc. and its affiliates reserve the right to make changes to the product(s) or inform ation contained herein without notice. mounting techniques 1. mount the base of t he chip directly on the ground plane (i.e. the metal floor of the package) and use short connections from the ground pads of the mmic to the ground plane. 2. use short ribbon bonds (0.005 to 0.010? wide) instead of wirebonds in the connection of the ground pads to ground. 3. elevate the ground plane to be at the same level as the ground pads on the chip surface. this can be done by: a. using ground plane pedestals next to the chip, as shown. b. depressing the chip into a channel in the ground plane, as shown. isolation performance of a gaas mmic switch can be degraded by parasitic effects introduced by the circuit in which the mmic is used. two primary causes of is olation degradation are excessive ground path inductances and crosstalk between rf paths (external to the mmic). this note will focus on techniques to reduce ground path inductances. the achievable isolation of a gaas mmic switch is a function of how low an inductance one can achieve between the ground pad of the mmic and the ground plane within a particular circuit. the lower the inductance, of course, the higher the isolation that can be achieved. for example, the curves shown for the masw6010g* chip in the catalog were obtained using coplanar rf probes directly on the chip because this is a copl anar probe configuration (which also includes the ground plane), there is virtually no ground inductance in the measurement. thus, the isolation obtained in the data sheet is for a very small ground inductance that exists and should be considered optimum. however, the isolation curves for the masw6020g* chip in the catalog were obtained with the chip mounted in a package having a flat ground plane on the floor of the pads to the ground plane. thus, the isolation obtained in the data sheet is when a finite inductance exists in the ground path. in practice when a chip is mounted into a circuit, there will always be some finite inductance which can degrade the isolation performance. several precautions can be taken to improve the isolation within a particular circuit. (see box) the technique used by m/a-com in most of the packaged mmic switch produc ts is that of #1 above. catalog performanc e of these products can be used as an indi cator of what can be expected if technique #1 is used. however, improvements can be ex pected in isolation performance if techniques 2 or 3 are used. this note briefly described techniques to obtain the maximum possible is olation when using a gaas mmic switch chips. several options were outlined which involved varying degrees of complexity. crosstalk, not addressed here, can also degrade isolation, and must minimized to obtain overall performance. * part number masw6010g supersedes sw-200 and masw6020g supersedes sw-210. pedestal ribbon bond ground plane chip ground plane ribbon bond chip
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